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High voltage MOS device design
| Metadata Label | Value |
|---|---|
| Author(s): | Omura, Ichiro |
| Publisher: | Unknown |
| Citation: | Omura, Ichiro. High voltage MOS device design. injection enhancement and negative gate capacitance by Ichiro Omura. (2000). http://dx.doi.org/10.3929/ethz-a-004180046 |
| Document Type: | Doctoral and Habilitation Theses |
| Documents: |
Abstract
(114.85KB) |
Detailed Information
| Metadata | Description |
|---|---|
| Title | High voltage MOS device design |
| Subtitle | injection enhancement and negative gate capacitance by Ichiro Omura |
| Author(s) | Omura, Ichiro |
| Publication Place | Zürich |
| Publication Date | 2000 |
| Notes | Diss., Technischen Wissenschaften ETH Zürich, Nr. 14049, 2001 |
| Language | English |
| DOI | http://dx.doi.org/10.3929/ethz-a-004180046 |
| Subject(s) | Electronics, Power Electronics and Mechatronics |
| Keyword(s) |
POWER ELECTRONICS GATE TURN-OFF THYRISTORS ELECTRONICS INSULATED-GATE-BIPOLAR-TRANSISTORS HIGH VOLTAGE UP TO 400 KV ELECTRICAL ENGINEERING METAL OXIDE SEMICONDUCTOR TRANSISTORS |
| Description | File Name | MIME Type | Size |
|---|---|---|---|
| Abstract |
eth-24149-01.pdf |
application/pdf | 114.85KB |
| Description | URL |
|---|---|
| NEBIS Link | http://opac.nebis.ch/F/?local_base=NEBIS&func=find-b&find_code=SYS&request=004180046 |
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| Downloads | 68 |  |
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E-Collection record created: Fri, 18 Apr 2008, 22:52:04 CET